Multilevel Logic and Timing Diagrams
On this page 5 headings
Start here A room has three doors, with a light switch at each one. Flip any switch and the bulb should change: on to off, or off to on. How would you build that circuit? You’ll solve it on this page, and you’ll learn to read the “wave pictures” (timing diagrams) that exams love.
So far we’ve built two-level circuits (AND then OR). Real circuits often use more levels, because that can save gates.
Example:
- Multilevel: 2 ORs → 1 AND → 1 OR (plus inverters).
- Two-level SOP: multiply out → . That’s 4 ANDs + one big 5-input OR. More gates.
Trade-off: multilevel = fewer gates (cheaper) but more levels = slower (the signal passes through more gates).
A timing diagram shows how signals change over time. Each signal is a line that is high (1) or low (0).
- Draw vertical lines wherever any input changes. This cuts time into slices.
- In each slice, read every input (0 or 1) and the output.
- Write each slice as a row of a truth table.
- Rows that never appear are “don’t care” (you can choose 0 or 1, whichever makes the circuit smaller).
- Simplify to get the function.
Example (from the slides):
| Slice | f | ||
|---|---|---|---|
| 1 | 0 | 0 | 1 |
| 2 | 0 | 1 | 1 |
| 3 | 1 | 0 | 0 |
| 4 | 1 | 1 | 1 |
Check: is 0 only when and , which is slice 3 ✓.
Think: flipping one switch must flip the bulb. Which gate flips its output when any one input flips? XOR!
Bulb = (on when an odd number of switches are up).
With 2-input XOR gates: 2 XOR gates.
In one line: Multilevel circuits save gates but add delay; to read a timing diagram, slice it where inputs change, make a truth table, and simplify. Three switches controlling one bulb is a 3-input XOR. Exam words: multilevel logic, gate levels, delay vs cost, timing diagram, time slice, don’t care, parity, XOR.
